In a transmission/reception system including a transmission device and a reception device connected to each other via a pair of signal lines included in a differential signal line, a signal input unit of the reception device inputs differential signals transmitted from the transmission device and samples the differential signals at a timing instructed by a clock so as to generate logical value data corresponding to a voltage between signals (corresponding to differential voltage). When high-speed differential transmission is performed by the transmission/reception system, a margin of the differential signal sampling by the signal input unit of the reception device is reduced by attenuating or reflecting the differential signals.
The margin of the differential signal sampling can be increased by adjusting the offset of the signal input unit of the reception device at the time of the differential signal sampling. The offset is, for example, a deviation of a threshold at the time of binary determination (digital value determination) for determining whether the voltage between the signals of the input differential signals is a logical value 1 or a logical value 0. The offset is caused by characteristics variation of each device included in the circuit. However, the offset can be adjusted by devising the circuit of the signal input unit.
In the invention disclosed in Patent Document 1, a pair of signal lines forming a differential signal line is short-circuited at an input end of a reception device, and an offset is detected based on data obtained by differential signal sampling. Then, the offset is adjusted based on the detection result.